AMD 10h

Results: 107



#Item
21Optimizing Google’s Warehouse Scale Computers: The NUMA Experience  Lingjia Tang† , Jason Mars† , Xiao Zhang‡ , Robert Hagmann‡ , Robert Hundt‡ , and Eric Tune‡ †  University of California, San Diego

Optimizing Google’s Warehouse Scale Computers: The NUMA Experience Lingjia Tang† , Jason Mars† , Xiao Zhang‡ , Robert Hagmann‡ , Robert Hundt‡ , and Eric Tune‡ † University of California, San Diego

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Source URL: static.googleusercontent.com

Language: English - Date: 2013-03-05 19:49:59
22The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices Karel De Vogeleer1 , Gerard Memmi1 , Pierre Jouvelot2 , and Fabien Coelho2 1 2

The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices Karel De Vogeleer1 , Gerard Memmi1 , Pierre Jouvelot2 , and Fabien Coelho2 1 2

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Source URL: www.cri.ensmp.fr

Language: English - Date: 2013-12-16 11:04:45
23Tagged memory and minion cores in the lowRISC SoC December 2014 lowRISC project team Computer Laboratory

Tagged memory and minion cores in the lowRISC SoC December 2014 lowRISC project team Computer Laboratory

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Source URL: www.lowrisc.org

Language: English - Date: 2015-05-13 16:22:20
24Sandbox Prefetching: Safe Run-Time Evaluation of Aggressive Prefetchers Seth H Pugsley1 , Zeshan Chishti2 , Chris Wilkerson2 , Peng-fei Chuang3 , Robert L Scott3 , Aamer Jaleel4 , Shih-Lien Lu2 , Kingsum Chow3 , and Raje

Sandbox Prefetching: Safe Run-Time Evaluation of Aggressive Prefetchers Seth H Pugsley1 , Zeshan Chishti2 , Chris Wilkerson2 , Peng-fei Chuang3 , Robert L Scott3 , Aamer Jaleel4 , Shih-Lien Lu2 , Kingsum Chow3 , and Raje

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Source URL: www.cs.utah.edu

Language: English - Date: 2014-01-10 15:51:59
25slide 1 gaius Encapsulation and Tunneling  encapsulation describes the process of placing an IP datagram inside a

slide 1 gaius Encapsulation and Tunneling encapsulation describes the process of placing an IP datagram inside a

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Source URL: floppsie.comp.glam.ac.uk

Language: English - Date: 2015-02-04 11:33:12
26NDC: Analyzing the Impact of 3D-Stacked Memory+Logic Devices on MapReduce Workloads Seth H Pugsley1, Jeffrey Jestes1, Huihui Zhang1 , Rajeev Balasubramonian1 , Vijayalakshmi Srinivasan2, Alper Buyuktosunoglu2, Al Davis1

NDC: Analyzing the Impact of 3D-Stacked Memory+Logic Devices on MapReduce Workloads Seth H Pugsley1, Jeffrey Jestes1, Huihui Zhang1 , Rajeev Balasubramonian1 , Vijayalakshmi Srinivasan2, Alper Buyuktosunoglu2, Al Davis1

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Source URL: www.cs.utah.edu

Language: English - Date: 2014-02-09 01:02:50
27The Intel® 870 Family of Enterprise Chipsets Fayé Briggs, Michel Cekleov*, Kai Cheng, Ken Creta, Manoj Khare, Steve Kulick, Akhilesh Kumar, Lily Looi, Chitra Natarajan, Linda Rankin Enterprise Products Group

The Intel® 870 Family of Enterprise Chipsets Fayé Briggs, Michel Cekleov*, Kai Cheng, Ken Creta, Manoj Khare, Steve Kulick, Akhilesh Kumar, Lily Looi, Chitra Natarajan, Linda Rankin Enterprise Products Group

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Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 23:39:59
28AMD Opteron™ 6000 Series Platform architecture: Red Hat Enterprise Linux performance Bhavna Sarathy Tech. Engineering Lead, Red Hat Alliance [removed]

AMD Opteron™ 6000 Series Platform architecture: Red Hat Enterprise Linux performance Bhavna Sarathy Tech. Engineering Lead, Red Hat Alliance [removed]

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Source URL: www.redhat.com

Language: English - Date: 2010-06-24 16:53:01
29c 2014 Aditya Agrawal REFRESH REDUCTION IN DYNAMIC MEMORIES  BY

c 2014 Aditya Agrawal REFRESH REDUCTION IN DYNAMIC MEMORIES BY

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2014-12-18 00:19:39
30Hot Chips  TM R18000 The Latest SGITM Superscalar Microprocessor

Hot Chips TM R18000 The Latest SGITM Superscalar Microprocessor

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Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 23:38:51